Radio Frequency (RF) & Wireless Design

I wrote in another post how Software Defined Radios are being changed by the next generation of Radio Frequency (RF) System on Chip (SoC) devices that are emerging from Xilinx (now part of AMD). The bandwidth of the latest versions of Xilinx parts are capable of sampling rates up to 10G Sps (samples per second) with resolution up to 12b ADCs / 14b DACs.

However, Xilinx is not the only player in the high end and Intel has come out with their version that is capable of up to 64G Sps, which for Nyquist (2x) sampling yields an operational frequency bandwidth of 32 GHz !! Which is amazing since most SDRs have been limited to the 6 GHz arena.

https://blogs.intel.com/psg/intels-new-technology-puts-adcs-and-dacs-operating-at-64-gsamples-sec-into-packaged-fpgas/

The reason for the 32 GHz bandwidth is because of the 5G frequency that enters into the Ka band for high speed data (video) connections. [ FYI, 6G will be in the 100s of GHz !! ] So the need to have the data converters perform at this sampling rate is required for the 5G applications.

https://www.intel.com/content/www/us/en/architecture-and-technology/programmable/analog-rf-fpga.html

The details on the ADC / DACS are not being published but the video demo on Intel's website showcases a 1,024 (10b) channel resolution. As mentioned in another one of my posts, ADC sampling speed is only one characteristic that defines the quality of the ADC performance as well as the SDR performance.

https://blogs.intel.com/psg/analog-devices-and-intel-collaborate-on-o-ran-compliant-5g-development-platform-melding-adis-rf-and-intel-fpga-technologies/

So look for more information from Intel and Xilinx as the RF SoC war has just started and I expect that it will continue for at least the next decade.

https://www.techplayon.com/o-ran-open-radio-unit-o-ru-reference-architecture/