Models
Work experience
FPGA Applications Engineer
Eleics Design Pvt.Ltd
•
August 2017 - present
- Analog Front End Design.
- Interface ADC with Spartan 6 FPGA
- RTL Design of SPI.
- RTL Design of UART.
- Developing user application using petalinux for embedded linux on Zynq 7020.
- Developing Application using Lwip.
Design Engineer
Globaltech (I) Pvt.Ltd
•
February 2016 - March 2017
- System level Design.
- Interface STM32F2 microcontroller with Spartan 3 FPGA.
- load .BIT File from USB stick from STM32F2 to configure FPGA.
- Optimise verilog code to remove warnings.
- RTL design of Bresenham algorithm.
- verilog code for motion control.
Education
Amity university
B.tech, Electronics and Communication
•
January 2010 - January 2014